I have tested my game on an intel duo core.
On lime 7.1, it couldn’t open, I had the error
in _pixman_implementation_create_sse2 () from ./lime.dll
But on 7.1.1 you Fixed a regression in older desktop CPU support
Now it opens 
But still closes a little while atfer.
The error is
Thread 4 "F1H5" received signal SIGILL, Illegal instruction.
[Switching to Thread 0x7ffff0ca4700 (LWP 2237)]
0x00007ffff60d695f in Resample_lerp_SSE2 () from ./lime.ndll
What instructions does your CPU support?
If you are on Windows, you can find it out with this utility – https://docs.microsoft.com/ru-ru/sysinternals/downloads/coreinfo if on Linux – cat /proc/cpuinfo
Here it is.
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 15
model name : Intel(R) Core(TM)2 Duo CPU T7250 @ 2.00GHz
stepping : 13
microcode : 0xa4
cpu MHz : 800.000
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts rep_good nopl aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm lahf_lm kaiser tpr_shadow vnmi flexpriority dtherm ida
bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf
bogomips : 3988.89
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 15
model name : Intel(R) Core(TM)2 Duo CPU T7250 @ 2.00GHz
stepping : 13
microcode : 0xa4
cpu MHz : 800.000
cache size : 2048 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts rep_good nopl aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm lahf_lm kaiser tpr_shadow vnmi flexpriority dtherm ida
bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf
bogomips : 3988.89
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
Do you have any way of reproducing this crash reliably, perhaps with one of the OpenFL samples, or some bit of code that runs?
EDIT: For reference, I found the method in question here, in case anyone sees something:
I have my program.
The thing is … in fact it’s on a computer I gave, so I don’t always have it around me. I can use teamviwere to access it, but’s not easy.
But if you say it’s about sound ( quite realistic , as it shuts down when I’m clicking on a button that produces a sound). It may have to do with this function playSound.
Humm, the only difference between with mixer_sse41.c are the lines
const int pos0 = _mm_cvtsi128_si32(_mm_shuffle_epi32(pos4, _MM_SHUFFLE(0, 0, 0, 0)));
const int pos1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(pos4, _MM_SHUFFLE(1, 1, 1, 1)));
const int pos2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(pos4, _MM_SHUFFLE(2, 2, 2, 2)));
const int pos3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(pos4, _MM_SHUFFLE(3, 3, 3, 3)));
instead of
const int pos0 = _mm_extract_epi32(pos4, 0);
const int pos1 = _mm_extract_epi32(pos4, 1);
const int pos2 = _mm_extract_epi32(pos4, 2);
const int pos3 = _mm_extract_epi32(pos4, 3);
I tried looking at which methods were supported by SSE2, and I thought that all the ones I checked in the file were supported 
Hmm I just rechecked all the methods on https://software.intel.com/sites/landingpage/IntrinsicsGuide/#
and it seems that there are all supported.
So maybe there’s an error on const int pos0 = _mm_cvtsi128_si32(_mm_shuffle_epi32(pos4, _MM_SHUFFLE(0, 0, 0, 0))); ?
So I tried to find an equivalent of _mm_extract_epi32(pos4, 0);
I found this post on https://stackoverflow.com/questions/4360920/whats-the-most-efficient-way-to-load-and-extract-32-bit-integer-values-from-a-1
Going all the way back to SSE2 you have _mm_extract_epi16 (PEXTRW) which can be used to extract any 16 bit element from a 128 bit vector. You would need to call this twice to get the two halves of a 32 bit element.
Maybe it could help ?
Or if we can’t use mixer_sse2.c mayve we can use mixer_sse.c ?
Sorry I don’t know anything about cpu instructions, just trying to see if there are any “obvious” solutions.
If you’re able, add printf ("1\n");, printf (2\n");, etc to the method, to see where it is actually crashing. I wonder if this is a bug in logic, or if it’s hitting a null value or overflowing the data length somehow. If we have to, we could disable SSE optimizations, but I have a feeling this is going to help our performance, especially on CPU-bound platforms (like mobile)
What do I need to do ? Do I just need to rebuild lime or is it more complex ? (seems more complex)
If it’s overly complex, maybe you could send me the lime.dll.
If you don’t think it would be too much trouble, follow the instructions here, it shouldn’t be too bad to set up:
This would be really helpful, because I don’t think I have a system here I could use to reproduce your crash, and I do want to have support for older systems as much as possible
Thanks ! It was really easy to rebuild lime.
Interesting thing.
With my usual computer, I actually see all the prints in mixer_sse2. So it shouldn’t be a bug in logic.
As you can see, my usual computer supports sse4_1, so shouldn’t it use mixer_sse41.c ?
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx rdseed adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp flush_l1d
Hmm, we compile all four of the SSE source files, but in our header, it looks like we are trying to request SSE, SSE2 and SSE3 only:
EDIT: Are you running Windows?
It looks like we do define it for macOS and Linux:
…actually, I’m confused what will happen on Linux:
Thanks again for your help
Both computers are on Linux.
Do you know if there’s way to “virtualize” my cpu flags ? If we could desactivate flags one by one maybe we could see what causes the problem.
flags that my old computer has that my new computer hasn’t:
lahf_lm kaiser
flags that my new computer has but my old computer hasn’t:
pdpe1gb rdtscp xtopology nonstop_tsc cpuid tsc_known_freq pclmulqdq smx sdbg fma pcid sse4_1
sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single
pti ssbd ibrs ibpb stibp ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx rdseed
adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves arat pln pts hwp hwp_notify hwp_act_window hwp_epp flush_l1d
I think that it would make sense to take the Linux configuration, and make it consistent. We should update the config-android.h file to enable SSE of some form (SSE2? SSE3?) and fix the -msse flag to match, or we should remove the -msse flag entirely and have SSE disabled. Enabling SSE would be good for performance, but I don’t know what should be the cut-off
What do I need to do to have it work on old computers ? Just remove the -mssse4.1 flag ?
I have installed an ubuntu on qemu , emulated the the intel2duo cpu core and it works on it . n But qemu is seems only to be able to hide cpu flags not disable them.
( you have to install qemu system , quemu user doesn’t work for some other reasons)
PS: Do you still need the printfs for the for intel Core Duo ?
Is there a way to activate sse only for cpu thats use sse ? ( Wasn’t it the objective of having of mixer_ss2c, a mixer _sse41c , etc ?)
For the value of sse, I did a grep on lime
and saw
that open al uses -msse4.1
pixman uses -msse3 and -mssse3
sdl uses -msse2
I think that they should use the same.
And maybe we could have lime flag to choose. My program don’t need to be super optimised, just need to be compatible with older computers. But for some persons it could be different.
Or see if it does really make a difference to activate sse ? are they any benchmarks ?
Thanks for your help, I have just revisited the configuration for SDL, Pixman and OpenAL, and should have them consistently using SSSE3 and lower, but not SSE4.
If you’re using Lime dev, do a git pull and git submodule update before rebuilding. I think this should fix support for you
on the
Intel(R) Core(TM)2 Duo CPU T7250 @ 2.00GHz
now on lime 7.1.2
it doesn’t open the program anymore , it just says
could not load module lime @ lime_application_create_prime
On 7.1.1 the program could open, and if you played a sound it said.
Thread 4 "F1H5" received signal SIGILL, Illegal instruction.
[Switching to Thread 0x7ffff0ca4700 (LWP 2237)]
0x00007ffff60d695f in Resample_lerp_SSE2 () from ./lime.ndll
On 7.1.1 with only the openal commit it acts like 7.1.2
it doesn’t open the program anymore , it just says
could not load module lime @ lime_application_create_prime
I’ve tried removing
<compilerflag value="-msse3" unless="rpi" />
<compilerflag value="-mssse3" unless="rpi" />
but it still the same.
Does someone on the forum have the same cpu or some other older cpu and could help ?
PS: between 7.1.1 and 7.12 I also had to update openfl. I didn’t try old 7.1.1 with old openfl with new openal.
So maybe it’s not openal anymore but openfl the problem?